This calculator sizes the gain and bias resistors for an inverting op-amp powered from a single supply. Choose a biasing method, enter the supply voltage, the gain and the parts you already have, and it returns the missing resistors (R1, R2, R3), the nearest standard E12/E24/E96 values, the gain and bias errors those values cause, the output's resting voltage, and warnings. It uses ideal op-amp equations, so always check the result against the datasheet of the op-amp you choose. For non-inverting stages, use the non-inverting calculator.
How to use
- Choose the op-amp type above (this page: inverting).
- Select the biasing method.
- Enter the supply voltage Vs.
- Enter the desired gain magnitude |Av|. The minus sign is applied for you.
- Enter the known values shown for that method: R2 (DC-coupled) or fc and C1 (AC-coupled), plus Vb and R4.
- Pick a resistor series and press Calculate. Results also update when you leave a field.
- Read the warnings, then check the design limits below against your op-amp's datasheet.
- Vs
- Single positive supply voltage, in volts (labelled VCC in the diagram).
- Av
- Closed-loop voltage gain, output volts per input volt. Inverting stages have negative gain.
- Vb
- Bias voltage applied to the non-inverting input; the output rests near it in AC-coupled stages.
- R1
- Input resistor, in series with the input (and with C1 when AC-coupled).
- R2
- Feedback resistor, from output to inverting input.
- R3, R4
- Bias divider: R3 from Vs, R4 to ground.
- C1, fc
- Input coupling capacitor and the low −3 dB frequency it forms with R1.
- Cb
- Bypass capacitor across the bias divider.
Equations and assumptions
In words: gain equals minus R2 divided by R1. The minus sign means the output is inverted (180° phase shift).
In words: bias voltage equals the supply times R4 over the sum of R3 and R4.
In words: the cutoff frequency is one over two pi times R1 times C1. The AC-coupled modes use this to find R1 from fc and C1.
In words: for a DC-coupled stage, the resting output equals Vb times (1 + R2/R1), minus the input's DC level times R2/R1. With an input capacitor there is no DC path through R1, so the resting output simply equals Vb.
Assumptions: ideal op-amp (infinite gain and bandwidth, zero offset), rail-to-rail output for the headroom estimate, negligible input bias current, an unloaded output, and a source resistance small compared with R1. Real parts differ; the design checks below list what to verify.
Design checks and limitations
None of these can be confirmed without a specific op-amp, so the calculator does not call a design safe.
Input common-mode range, output swing and supply
The bias voltage Vb must lie inside the op-amp's input common-mode range, and outputs stop short of the rails unless the part is rail-to-rail. Confirm the part is rated for your Vs.
Gain-bandwidth and slew rate
Gain-bandwidth should comfortably exceed (1 + |Av|) × the highest signal frequency. Slew rate should exceed 2Ï€ × f × Vpeak of the output.
Offset voltage, bias current and resistor noise
Input offset voltage is amplified by (1 + R2/R1). Bias current flowing through large resistors adds DC error. Resistor thermal noise grows with resistance, so very high values are noisy.
Resistor tolerance
Recommended standard values still vary by their tolerance (commonly ±1% to ±5%), which adds to the errors shown.
Output load and stability
Heavy loads reduce swing. Capacitive loads can cause ringing or oscillation; add a small series resistor at the output if the datasheet advises it.
Worked example
DC-coupled: Vs = 9 V, |Av| = 20, Vb = 4.5 V, R2 = 1 kΩ, R4 = 4 kΩ, input source at 0 V.
- R1 = R2/|Av| = 1000/20 = 50 Ω.
- R3 = R4(Vs/Vb − 1) = 4 kΩ × (9/4.5 − 1) = 4 kΩ.
- Check: Vb = 9 × 4/(4 + 4) = 4.5 V, and gain = −1000/50 = −20.
- Warnings: R1 = 50 Ω is very low. With the input at 0 V the output rests at 4.5 × 21 = 94.5 V, far above the 9 V supply, so it clips. Fix it by biasing the source near Vb (set Vin,dc = 4.5 V) or by AC coupling.
AC-coupled: same Vs, gain, Vb and R4, with fc = 100 Hz and C1 = 1 µF.
- R1 = 1/(2Ï€ × 100 × 1 µF) ≈ 1.59 kΩ; R2 = 20 × 1.59 kΩ ≈ 31.83 kΩ; R3 = 4 kΩ.
- The output rests at Vb = 4.5 V, so it can swing up to about ±4.5 V before clipping (ideal rails).
- Cb ≥ 10/(2Ï€ × 100 × 2 kΩ) ≈ 7.96 µF, so use 8.2 µF or more (2 kΩ = R3 in parallel with R4).
FAQ
Why does a single-supply inverting amplifier need a bias voltage?
The output cannot go below 0 V. Without bias, the negative half of the signal would be cut off. The bias voltage lifts the non-inverting input, and therefore the resting output, so the signal swings above and below it.
Why bias near half the supply?
Resting at Vs/2 leaves equal room to swing up toward Vs and down toward 0 V, so clipping is symmetrical. The calculator warns when the resting output is far from Vs/2.
What does the negative gain mean?
The output is inverted. A positive input step gives a negative output step of |Av| times the size, relative to the bias level.
Why do the recommended values differ from the calculated ones?
Resistors only come in standard series values. The calculator tries the neighbouring standard values and keeps the combination with the lowest error.
Related tools
Free online calculator to bias AC- and DC-coupled inverting and non-inverting op-amps with split-resistor, voltage-divider and voltage-follower biasing methods.